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Arteris® IP Helps Automate System-on-Chip Semiconductor Design Traceability with Harmony Trace™️ Design Data Intelligence – GlobeNewswire

Data intelligence

CAMPBELL, Calif., Nov. 16, 2021 (GLOBE NEWSWIRE) —  Arteris IP (NASDAQ: AIP), A quantity one supplier of system-on-chip (SoC) system IP consisting of community-on-chip (NoC) interconnect and IP deployment Computer software that velocity up SoC creation, right now introduced the launch of the Arteris®Concord Hint™️ Design Knowledge Intelligence Reply to ease compliance with semiconductor enterprise useful safety and extreme quality regulars Similar to ISO 26262, IEC 61508, ISO 9001, and IATF 16949.

Highlights of this Announcement:

  • Concord Hint will enhance system extreme quality and velocity ups useful safety assessments by figuring out and fixing the traceability gaps between disparate methods.
  • Concord Hint is carried out as an enterprise-diploma server-based mostly software with An internet-based mostly consumer interface (UI).
  • Concord Hint Is unique as a Outcome of it currents engineers The liberty To make the most of the “biggest system for the job” and automates hyperlinking requirements and artifacts.

For design teams with useful safety requirements or who create complicated SoCs or methods, Arteris® Concord Hint™️ will enhance system extreme quality and The power To understand useful safety certifications. By creating and sustaining traceability between disparate methods for requirements, particularations, EDA and hardware designs, Computer software code, and docation, engineers will know immediately when a change occurs and the influence of that change on fullly different design artifacts and parts of the system.

Concord Hint is carried out as an enterprise-diploma server-based mostly software with An internet-based mostly UI that interfaces with EDA, docation, current requirements, Computer software engineering and assist methods. In distinction to Application Lifecycle Administration (ALM) and Product Lifecycle Administration (PLM) options that require engineers To make the most of a single environment That might not biggest-in-class in Anyone facet, Arteris Concord Hint creates a system-of-methods That permits full visibility Of requirements traceability by way of The complete SoC design circulate and product life cycle.

“Creating A posh SoC typically includes A set of disparate and disconnected models, which makes it troublesome To take care of a doc That permits tracing design requirements and artifacts over the product’s lifetime,” said Mike Demler, senior analyst On the Linley Group. “However Arteris Concord Hint mitigates these factors by connecting discrete silos such that buyers can monitor requirements, implementation, verification and docation mismatches throughout current methods. Which suggests engineers can proceed To make the most of biggest-in-class options and utilized sciences like EDA models, IBM Doorways, Jama, Jira, DITA, and IP-XACT whereas experiencing The advantages of automated traceability. Concord Hint assists design teams meet The regular And alter management requirements of useful safety regulars Similar to ISO 26262 and IEC 61508.”

“The event of Arteris Concord Hint was pushed by our buyers’ Should decide An automated traceability circulate and implement change management biggest practices between their current requirements, particularation, EDA, code repository and docation models,” said K. Charles Janac, president and CEO of Arteris IP. “Concord Hint permits our buyers To make the most of their current models and mechanically hyperlink data between them Because of its distinctive semiconductor enterprise-particular semantic computing know-how.”

About Arteris IP
Arteris IP (NASDAQ: AIP) currents system-on-chip (SoC) system IP consisting of community-on-chip (NoC) interconnect IP and IP deployment know-how to velocity up system-on-chip (SoC) semiconductor enhancement and integration for A Number of softwares from AI to automobiles, Cell telephones, IoT, cameras, SSD controllers, and servers For patrons Similar to Bosch, Baidu, Mobileye, Samsung, Toshiba and NXP. Arteris IP merchandise embrace the Ncore® cache coherent interconnect IP and FlexNoC® non-coherent interconnect IP, the CodaCache® standalone final diploma cache, and optionally available Resilience Package deal (ISO 26262 useful safety), FlexNoC AI Package deal, and PIANO® automated timing closure capabilities. Our IP deployment merchandise current clever automation that velocity ups the enhancement and will enhance The regular of SoC hardware designs and their associated Computer software and agencyware, verification and simulation platforms, and particularations and buyer docation. Customer end outcomes obtained Through the use of Arteris IP merchandise embrace decrease power, greater efficiency, extra environment nice design reuse and faster SoC enhancement, Ensuing in decrease enhancement and manufacturing prices. For extra information, go to www.arteris.com or discover us on LinkedIn at https://www.hyperlinkedin.com/agency/arteris.

Arteris, Arteris IP, FlexNoC, Ncore, CodaCache, PIANO, and the Arteris IP emblem are registered emblems of Arteris, Inc. Arteris Concord Hint and Arteris Concord are emblems of Arteris, Inc. All fullly different Providers or merchandise names are the property of their respective house owners.

Contact:

Kurt Shuler                                                                
Arteris IP                                                        
+1 408-470-7300                                                        
[email protected]  

A video acagencying this announcement Is out there at https://www.globenewswire.com/NewsRoom/AttachmentNg/835e9c39-4d67-4fe7-9aff-fcc4bccd6ee7

Source: https://www.globenewswire.com/news-release/2021/11/16/2335429/0/en/Arteris-IP-Helps-Automate-System-on-Chip-Semiconductor-Design-Traceability-with-Harmony-Trace-%EF%B8%8F-Design-Data-Intelligence.html